Premium 100g Qsfp28 Zr4 80km Fiber Optic Module for Data Centers
CC-QKKLL8L-SD is designed for 103 Gigabit Ethernet links over 80km single mode fiber. It is compliant with IEEE 802.3ba. Digita.diagnostics functions are available via an I2C interface, as specified by the QSFP28 MSA.
- Model No.100G QSFP28 ZR4 80km
- Support Network:Ethernet
- Condition: New
Product Details
PRICE: US$1,950.00-2,000.00 1 Piece (MOQ)
Basic Info.
Product Description
100G QSFP28 ZR4 80km LAN-WDM Transceiver
100GBase QSFP28 ER4 40KM Optical Transceiver Module
Features
.Supports 103Gbps
.Up to 80km for G.652 SMF
.Single 3.3V Power Supply and Power dissipation < 7.5W
.4x28Gbps EML-based LAN-WDM cooling transmitter
.SOA+PIN and TIA array on the receiver side
.4x28Gbps retimed electrica.interface
.Duplex LC receptacles
.I2C interface with integrated Digita.Diagnostic Monitoring
.Operating Case Temperature: -40°C ~85°C
Applications
.100GBASE-ZR4 Ethernet
Standard
.Compliant with QSFP28 MSA Specification
.Class 1 FDA and IEC60825-1 Laser Safety Compliant
Product Description
CC-QKKLL8L-SD is designed for 103 Gigabit Ethernet links over 80km single mode fiber. It is compliant with IEEE 802.3ba. Digita.diagnostics functions are available via an I2C interface, as specified by the QSFP28 MSA.
| Parameter | Symbol | Min. | Typ. | Max. | Unit |
| Transmitter | |||||
| Signaling Rate, each lane | BRAVE | 25.78 | Gbps | ||
| Data Rate Variation | -100 | +100 | Ppm | ||
| Lane_0 Center Wavelength | λC0 | 1294.53 | 1295.56 | 1296.59 | nm |
| Lane_1 Center Wavelength | λC1 | 1299.02 | 1300.05 | 1301.09 | nm |
| Lane_2 Center Wavelength | λC2 | 1303.54 | 1304.58 | 1305.63 | nm |
| Lane_3 Center Wavelength | λC3 | 1308.09 | 1309.14 | 1310.19 | nm |
| Side-mode Suppression ratio | SMSR | 30 | dB | ||
| Total Average Output Power | Po | 12.5 | dBm | ||
| Average Launch Power each lane*(Note1) | Peach | 2 | 6 | dBm | |
| Optical Modulation Amplitude (OMA) each lane | TXOMA | 3.6 | dBm | ||
| Average launch power of OFF transmitter each lane | Poff | -30 | dBm | ||
| Transmitter and Dispersion Penalty (TDP), each lane | TDP | 2.5 | dB | ||
| Extinction Ratio, each lane | ER | 8 | dB | ||
| Relative Intensity Noise | RIN | -130 | dB/hz | ||
| Transmitter Reflectance | REFLT | -12 | dB | ||
| Optical Return Loss Tolerance | 20 | dB | |||
| Transmitter eye mask definition {X1, X2, X3, Y1, Y2, Y3}*(Note2) | {0.25, 0.4, 0.45, 0.25, 0.28, 0.4} | ||||
| Receiver | |||||
| Average Receive Power, each lane *(Note3) | RPOW | -28 | 3 | dBm | |
| Damage threshold, each lane | RDAM | 4 | dBm | ||
| Receive Power, each lane (OMA) | RxOMA | 3 | dBm | ||
| Receive Sensitivity (OMA), each lane | RxSENS | -28 | dBm | ||
| Receiver Reflectance | REFLR | -26 | dB | ||
| LOS Assert, each lane | LOSA | -39 | dBm | ||
| LOS De-Assert, each lane | LOSD | -29 | dBm | ||
| LOS Hysteresis, each lane | 0.5 | dB |
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Notes |
| Transmitter | ||||||
| Differential data input swing per lane | Vin | 300 | 900 | mVp-p | ||
| Input Impedance (Differential) | Zin | 90 | 100 | 110 | % | |
| Receiver | ||||||
| Output Amplitude (Differential) | Vout | 300 | 900 | mVp-p | ||
| Output Impedance (Differential) | Zout | 90 | 100 | 110 | % | |
| Output Rise/Fall Time | tr/tf | 20 | ps | 20%~80% | ||
| Parameter | Symbol | Min. | Typ. | Max. | Unit |
| Operating Case Temperature | Tc | -40 | 85 | °C | |
| Power Supply Voltage | Vcc | 3.135 | 3.3 | 3.465 | V |
| Power Dissipation | PD | 7.5 | W |
| Pin | Logic | Symbol | Description | Plug Sequence | Notes |
| 1 | GND | Ground | 1 | 1) | |
| 2 | CML-1 | Tx2n | Transmitter Inverted Data Input | 3 | |
| 3 | CML-1 | Tx2p | Transmitter Non-Inverted Data Input | 3 | |
| 4 | GND | Ground | 1 | 1) | |
| 5 | CML-1 | Tx4n | Transmitter Inverted Data Input | 3 | |
| 6 | CML-1 | Tx4p | Transmitter Non-Inverted Data Input | 3 | |
| 7 | GND | Ground | 1 | 1) | |
| 8 | LVTTL-1 | ModSelL | Module Select | 3 | |
| 9 | LVTTL-1 | ResetL | Module Reset | 3 | |
| 10 | VccRx | +3.3V Power Supply Receiver | 2 | 2) | |
| 11 | LVCMOS-I/O | SCL | 2-wire serial interface clock | 3 | |
| 12 | LVCMOS-I/O | SDA | 2-wire serial interface data | 3 | |
| 13 | GND | Ground | 1 | 1) | |
| 14 | CML-O | Rx3p | Receiver Non-Inverted Data Output | 3 | |
| 15 | CML-O | Rx3n | Receiver Inverted Data Output | 3 | |
| 16 | GND | Ground | 1 | 1) |
| 17 | CML-O | Rx1p | Receiver Non-Inverted Data Output | 3 | |
| 18 | CML-O | Rx1n | Receiver Inverted Data Output | 3 | |
| 19 | GND | Ground | 1 | 1) |
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